The present disclosure relates to a semiconductor memory device and, more particularly, to a sense amplifier driving circuit capable of reducing current consumption in a write operation and a semiconductor memory device having the same.
Generally, a semiconductor memory device such as a DRAM performs read and write operations as essential functions. Read operation is carried out by sensing and amplifying cell data and outputting, the amplified data through a data pad. Particularly, the read operation performs a local data transmission in which the cell data amplified by a sense amplifier are transferred to local I/O lines, a global data transmission in which the data loaded on the local I/O lines are transferred to global I/O lines through an I/O sense amplifier IOSA, and a data pad transmission in which the data loaded on the global I/O lines are transferred to the data pad.
Meanwhile, write operation is performed to store data from the data pad in the memory cell. More concretely, the write operation performs an amplifying operation in which data to be stored are loaded on the bit lines and amplified by a sense amplifier, a driving operation in which the bit line on which the data are loaded is driven based on the data level from the data pad, and a storage operation in which the bit line data driven based on the data level are stored in the memory cell.
FIG. 1 is a block diagram illustrating a write operation of a conventional semiconductor memory device.
Referring to FIG. 1, the conventional semiconductor memory device includes a write driver 1 and a bit line sense amplifier (BLSA) 2. The write driver 1 receives data transferred from a data pad via global I/O lines GIO and GIOB and drives local I/O lines LIO and LIOB. At this time, the BLSA 2 amplifies the data loaded on bit lines. When an output enable signal Yi is activated to a high level, NMOS transistors N1 and N2 are turned on and the data of the local I/O lines LIO and LIOB, which are driven by the write driver 1, are loaded on the bit line via segment I/O lines SIO and SIOB. The data loaded on the bit lines are stored in a memory cell.